The International Conference on High Performance Computing & Simulation
The 16th Annual Meeting
July 16 – 20, 2018
HPCS 2018 PANELS
PANEL I: The Cloud Forensic Problem and the European Union
General Data Protection Regulation (GDPR)
MODERATOR: Robert Duncan
(University of Aberdeen, Aberdeen, U.K.)
Martin Gilje Jaatun (SINTEF Digital, Trondheim, Norway)
George Weir (University of Strathclyde, Glasgow, U.K.)
Magnus Westerlund (Arcada University of Applied Sciences, Helsinki, Finland)
Cloud computing has been a great enabler for a great many companies and individuals in the decade or so since it gained traction. The ability to access new systems rapidly without concern for forward planning, accessing corporate budgets and in particular the ability to scale up (or down) on demand has proved particularly attractive. A great many researchers have been actively involved to ensure that systems are developed in a responsible way to ensure the security and privacy of users.
However, there remains a fundamental issue which is of great concern. Namely, that once an attacker successfully breaches a cloud system and becomes an intruder, usually escalating privileges the longer they are in the system, there is nothing then to prevent them from deleting or modifying the forensic trail. This presents a serious challenge, and in the light of the forthcoming regulation from various countries, and of particular interest the forthcoming EU General Data Protection Regulation (GDPR), which has a regime of penalties that can rise up to the greater of €20 million or 4% of Global Turnover. The other challenging aspect of this legislation is that any security breach must be reported within 72 hours. For cloud users who are breached, particularly where the intruder deletes or modifies the forensic trail, this becomes a virtually impossible requirement to comply with, which can also lead to an increase in the fine levied.
Solving this problem presents a seriously difficult challenge, but without solving this problem, this leads to a serious issue with compliance on the EU GDPR and other similar legislation around the globe, which can lead to massive levels of fines being levied. Looking at the cyber breach reports regularly carried out each year by a number of security organizations, it is very clear that a great many companies are nowhere near being able to comply with this tight reporting requirement, let alone understand which records have been accessed, modified or deleted. Given that the regulation comes into effect on the 25th May 2018, it is clear that many companies are walking blind into a major disaster.
This panel will address the above issues and consequences.
PANELISTS SHORT BIOS:
Martin Gilje Jaatun is a Senior Scientist at SINTEF Digital and an Adjunct Professor at the University of Stavanger. He graduated from the Norwegian Institute of Technology (NTH) in 1992, and received the Dr.Philos. degree from the University of Stavanger in 2015. Previous positions include scientist at the Norwegian Defence Research Establishment (FFI), and Senior Lecturer in information security at the Bodø Graduate School of Business. His research interests include software security, security in cloud computing, and security of critical information infrastructures. He is vice chairman of the Cloud Computing Association (cloudcom.org), vice chair of IEEE TCCLD, and a Senior Member of the IEEE. He is also an IEEE Cybersecurity ambassador, and Editor-in-Chief of the International Journal of Secure Software Engineering.
George Weir is a Lecturer in Computer Science, University of Strathclyde, U.K., and Adjunct Professor at the School of Criminology, Simon Fraser University, Canada. Dr. Weir has published extensively on Security, HCI, e-learning, readability and Corpus Linguistics. His current focus is on Security and Digital Forensics in the Cloud. Dr. Weir has been supervising 13 PhD students on aspects of Information Security.
Magnus Westerlund is a senior lecturer in software development and programme director of the master degree programme in big data analytics at Arcada University of Applied Sciences in Helsinki, Finland. He has a background from the private sector in telecom and information management. Magnus has research publications in the field of analytics, IT-security, GDPR, and most recently the application of blockchain technology. His current research topics are found in the convergence area of the distributed cloud enabled by distributed ledger technology, extended reality, and the application of intelligent agents.
Thomas Sterling holds the position of Professor of Electrical Engineering at the Indiana University (IU) School of Informatics, Computing, and Engineering as well as serves as the PI of the SMART group at the Department of Intelligence Systems Engineering. Since receiving his Ph.D. from MIT in 1984 as a Hertz Fellow, Dr. Sterling has engaged in applied research in parallel computing system structures, semantics, and operation in industry, government labs, and academia. Dr. Sterling is best known as the "father of Beowulf" for his pioneering research in commodity/Linux cluster computing for which he shared the Gordon Bell Prize in 1997. He led the HTMT Project sponsored by multiple agencies to explore advanced technologies and their implication for high-end computer system architectures. Other research projects in which he contributed included the DARPA DIVA PIM architecture project with USC-ISI, the DARPA sponsored HPCS program Cray-led Cascade Petaflops architecture, and the Gilgamesh high-density computing project at NASA JPL. Sterling is currently involved in research associated with the innovative ParalleX execution model for extreme scale computing to establish the foundation principles guiding the development of future generation Exascale computing systems. SMART is currently developing a radically new non-von Neumann architecture, Simultac, using active memory to accelerate dynamic graph computing applications. Dr. Sterling is the co-author of seven books and holds six patents. He was the recipient of the 2013 Vanguard Award and is a Fellow of the AAAS. Most recently, he co-authored the introductory textbook, “High Performance Computing”, published by Morgan-Kaufmann in December, 2017.
Mads Nygård is since 1997 a Full Professor in IDI (Department of Computer Science) at NTNU (Norwegian University of Science and Technology), from which he was also awarded his Doctorate degree in 1990. From 2017 and also in the period 2009-2013 he is and was Dean of Engineering Education for all NTNU, while in the period 2013-2017 he was Head of External Relations and Cooperation at IDI/NTNU. In the period 1983-1997, he was employed in SINTEF (Foundation for Scientific and Industrial Research at the Norwegian Institute of Technology) in different ICT departments as Scientist, Principle Research Scientist, Section Head and Research Manager. From 2014, he is Chairman of the Executive Council for Information and Communication Technology at Universities & Colleges in Norway (under the Norwegian Association of Higher Education Institutions). In the period 2010-2014, he was Vice President and Member of the Board of Directors of CESAER (Conference of European Schools for Advanced Engineering Education and Research), and he still is CESAER’s Task Force Chair for its benchmarking activities. In the period 2009-2013, he was Chairman of the Board of Directors at UNIK (University Graduate Centre at Kjeller), in the period 2009-2013, also Chairman of the Executive Board for the National Council of Technology Education in Norway (under the Norwegian Association of Higher Education Institutions), and in the period 2012-2016, Chairman of the Executive Board for the Strategic University Colleges Program in Norway (under the Research Council of Norway). From 2007, he has been and is General Co-Chair for HPCS (the High Performance Computing and Simulation Conferences), in the period 2009-2016, was Technical Program Committee Co-Chair for CTS (the Collaborative Technologies and Systems Conferences), and in 2005, was Organization Committee Chair for VLDB (the Very Large Data Base Conference). In the period 2009-2011, he was Vice President of the Board of Directors, and in the period 2011-2013 Chairman of the Board of Representatives of TEKNA (Norwegian Society of Chartered Technical and Scientific Professionals).
Bernd Mohr started to design and develop tools for performance analysis of parallel programs already with his diploma thesis (1987) at the University of Erlangen in Germany, and continued this in his Ph.D. work (1987 to 1992). During a three year postdoc position at the University of Oregon, he designed and implemented the original TAU performance analysis framework. Since 1996 he has been a senior scientist at Forschungszentrum Jülich. Since 2000, he has been the team leader of the group ''Programming Environments and Performance Analysis''. Besides being responsible for user support and training in regard to performance tools at the Jülich Supercomputing Centre (JSC), he is leading the Scalasca performance tools efforts in collaboration with Prof. Felix Wolf of TU Darmstadt. Since 2007, he also serves as deputy head for the JSC division ''Application support''. He was an active member in the International Exascale Software Project (IESP/BDEC) and work package leader in the European (EESI2) and Juelich (EIC, ECL) Exascale efforts. For the SC and ISC Conference series, he serves on the Steering Committee. He is the author of several dozen conference and journal articles about performance analysis and tuning of parallel programs.
PANEL II: Opportunities and Challenges Facing the HPC Community
in the Exascale Era and Beyond: Intelligent Systems,
Deep Learning, Clouds, and Analytics
MODERATOR: Mads Nygård
(Norwegian University of Science and Technology, Norway)
Marc Duranton (Commissariat à l'Energie Atomique et aux Energies Alternatives (CEA), France)
Bernd Mohr (Jülich Supercomputing Centre, Germany)
Thomas Sterling (Indiana University – Bloomington, Indiana, USA)
In the Exascale era, a computing system is capable of processing at least one billion billion calculations per second. This higher level of performance in computing systems will have profound impacts on every aspect of current research communities, especially those in High Performance Computing (HPC) community.
Meanwhile, the rapid development of Cloud based technologies makes more applications possible. Furthermore, the techniques in Intelligent Systems and Analytics, especially Deep Learning, have matured enough to a degree that they are applicable to a variety of versatile research areas, including those in HPC.
This panel will discuss the opportunities and challenges in HPC that can be addressed by Intelligent Systems, Deep Learning, Clouds, and Analytics. Simultaneously, it will also attempt to discuss the opportunities and challenges in Intelligent Systems, Deep Learning, Clouds, and Analytics that can be addressed by HPC.
PANELISTS SHORT BIOS:
Marc Duranton is a member of the List institute of the Research and Technology Department of CEA (French Atomic Energy Commission), where he is involved in realizations for Deep Learning and on Cyber Physical Systems. He previously spent more than 23 years in Philips and Philips Semiconductors where he led the development of the family of L-Neuro chips, digital processors using artificial neural networks techniques. He also worked on several video coprocessors for the VLIW processor TriMedia and for various Nexperia platforms. In NXP Semiconductors, he was in charge of Ne-XVP project that targeted the design of the hardware and software of a multi-core processor for real-time applications and for consumer video processing. His interests include Deep Learning, Artificial Intelligence and emerging paradigms for computing systems, HPC, embedded systems, (Cognitive) Cyber Physical Systems, parallel architectures for high performance and real-time processing, models of computation and communication with time guaranties. He has published more than 35 patents and several book chapters. He is a member of the College of Ethics of CEA on "Moral issues in automatic decision-making processes". He is in charge of the roadmap activity of HiPEAC on High Performance and Embedded Architecture and Compilation, freely available at http://www.hipeac.net/roadmap.
Bob Duncan has a background in accounting, with many decades of experience in industry, and has watched the development and implementation of IT systems over the decades. With a recent MA (Hons) in Computing and a PhD in Computing Science, specialising in Cloud Security, he has an avid interest in Cloud Cyber Security. He is particularly interested in Cloud systems from a security perspective, due to the possible opportunities offered by the flexibility of cloud systems, but is concerned as to how easy it is for corporates to lose sight of the security implications for their business. This is particularly problematic with the development of modern legislation and regulation concerning matters of data protection, and in particular, the forthcoming EU General Data Protection Regulation.